1. Field of the Disclosure
The present disclosure relates to an array substrate for liquid crystal display (LCD) devices and method of manufacturing the same.
2. Background of the Disclosure
Recently, as society advances to the information-oriented society, the display field of processing and displaying a massive amount of information is rapidly advancing. In particular, thin film transistor (TFT) LCD devices, which have excellent performance in terms of thinning, lightening, and low power consumption, have been developed and are replacing the existing cathode ray tube (CRT).
In particular, active matrix LCD devices which use a TFT as a switching element is suitable to display a moving image.
Hereinafter, a structure of a general active matrix LCD device will be described in detail with reference to the drawing.
FIG. 1 is a diagram schematically illustrating a structure of a general active matrix LCD device.
With reference to FIG. 1, the active matrix LCD device includes a liquid crystal panel 1 configured with a plurality of switching elements T which are respectively formed at a plurality of areas defined by intersections between a plurality of gate lines GL and a plurality of data lines DL. The liquid crystal panel 1 has a structure in which a digital video signal is converted into an analog signal by using a gamma voltage, the analog signal is supplied to a data line DL, a gate signal is supplied to a gate line GL simultaneously with the supply of the analogy signal, and a data signal is charged into a liquid crystal cell C.
Although not shown in detail, a gate electrode of a switching element C is connected to the gate line GL, a source electrode of the switching element C is connected to the data line DL, and a drain electrode of the switching element C is connected to a pixel electrode of the liquid crystal cell C.
A common voltage Vcom is supplied to a common electrode of the liquid crystal cell C through a common line CL. When the gate signal is applied to the gate line GL, the switching element T is turned on to form a channel between the source electrode and the drain electrode, and supplies a voltage, applied through the data line DL, to the pixel electrode of the liquid crystal cell C. At this time, alignment of liquid crystal molecules of the liquid crystal cell C is changed by an electric field between the pixel electrode and the common electrode, thereby displaying an image based on incident light.
A twisted nematic (TN) mode or an in-plane switching (IPS) mode, which is a driving mode of the LCD device, is determined depending on positions of the common electrode and pixel electrode of the liquid crystal panel 1. In particular, the IPS mode in which the common electrode and the pixel electrode are disposed in parallel on one substrate to generate a lateral electric field has a broader viewing angle than that of the TN mode in which the common electrode and the pixel electrode are disposed on different substrates to be opposite to each other and generate a lateral electric field.
A gate driving unit 2 for driving the plurality of gate lines GL and a data driving unit 3 for driving the plurality of data lines DL are connected to the liquid crystal panel 1 of the LCD device having the above-description configuration. As LCD devices enlarge in size and become higher in resolution, the number of integrated circuits (ICs) configuring each of the gate driving unit 2 and the data driving unit 3 increases.
However, since the IC of the data driving unit 3 is relatively more expensive than other elements, technology for decreasing the number of the ICs of the data driving unit 3 is being recently researched and developed for reducing the manufacturing cost of an LCD device. As an example of the technology, a double rate driving (DRD) structure is being developed in which the number of the gate lines GL increases by two times, the number of the data lines DL is reduced by half (½), the number of the ICs of the data driving unit 3 is reduced by half, and a resolution is maintained identically to the existing resolution.
In the DRD structure, the cost is reduced, but since the number of the gate lines GL increases and thus an operable time of a device is shortened, a design with the consideration of charging efficiency and a charging rate is needed. Also, since a plurality of gate lines GL are further provided in a vertical direction, an aperture ratio is lowered in inverse proportion to an increase in the number of the gate lines.